In integrated circuit fabrication, the size of a die (or diced semiconductor wafer) that can be economically produced is limited by defects. The fabrication process inherently produces a certain average number of defects per unit area, such that dice that are larger in area are less likely to be functional. Consequently the cost per die significantly increases for dice that are larger in area. For dice that contain regular structures such as memories or an array of logic, redundancy within the dice can be used to avoid defective structures. This significantly reduces the cost of large dice. However, such an approach does not work well with irregular structures or structures that are coupled to specific input/output (I/O) connection points.
One approach to this inherent problem makes use of multi-chip modules (MCMs) to enable fabrication of large and complex systems at a lower cost. Using this approach, a system within a single package is divided into a number of dice on a substrate with relatively fast inter-die I/O connections or lines. Such I/O connections between dice in a single package may be shorter and constructed from finer wires than connections between dice in different packages. This package configuration enables not only more connections, but faster connections, though the connections will still be slower than connections within a single die. During manufacture, the individual die in an MCM can be tested so that only known acceptable (e.g., not defective) dice are bonded onto a single substrate. Further, the yield enhancement is not dependent on any regularity of logic within the MCM; that is to say, there can be any number of arbitrary structures in the MCM.
However, the inter-die I/O connections of an MCM are subject to defects as well. Consequently, the final product yield may not be as high as desired.